The AD7528 contains two identical 8_bit multiplying D/A converters, DAC A and DAC B. Data is transferred into either of the two DAC data latches via a common 8_bit TTL/CMOS compatible input port. The control line DAC SEL determines which DAC is to be loaded. The AD7528's load cycle is similar to the write cycle of a random access memory.
On the DSS the CS line of the AD7528 is tied low. The WR line therefore is used to control the chip as far as when it will accept data.