Subject: Re: Ram Question Newsgroups: comp.sys.apple2 From: dempson@actrix.gen.nz (David Empson) Date: Fri, 3 Dec 1999 22:58:31 +1300 Message-ID: <1e29dp1.1dztiezo24zraN%dempson@actrix.gen.nz> References: <38475101.457F122@cyberhighway.net> Organization: Empsoft User-Agent: MacSOUP/2.4.2 NNTP-Posting-Host: 202.49.157.176 X-Original-NNTP-Posting-Host: 202.49.157.176 X-Trace: 3 Dec 1999 22:57:15 NZST, 202.49.157.176 Lines: 46 Frank Carney wrote: > The Apple II uses the second clock phase to refresh RAM. It actually uses the second clock phase to display video, which has the side effect of refreshing the RAM. > Does the IIGS do the same thing for RAM in the RAM expansion slot? No. The "slow" RAM on the IIgs motherboard (128 KB), which is under the control of the "Mega II" chip, is refreshed exactly like in 8-bit machines. (In effect, the Mega II contains nearly all the motherboard components of a IIe, minus the CPU and RAM.) The "fast" RAM on the IIgs motherboard (128 KB or 1 MB), plus the fast RAM in the memory expansion slot, is refreshed using explicit refresh cycles generated by the FPI (Fast Processor Interface) chip. (With the 1 MB motherboard, a.k.a. ROM 3, this chip is actually labelled "CYA", which is rumoured to stand for "Control Your Apple".) The fast RAM nominally operates at 2.8 MHz, but the refreshing causes the average access speed to drop to more like 2.6 MHz. It is interesting to note that the FPI can generate fast RAM refresh cycles without interfering with CPU accesses to slow RAM, I/O or ROM. Since the ROM runs on the "fast" side of the machine, this means that ROM accesses can proceed at the full 2.8 MHz. This is one of the main reasons why a ROM 3 IIgs is slightly faster than a ROM 1: there is more toolbox code in ROM (particularly the newer System 5 version of QuickDraw with its improved performance), so graphics drawing can run as much as 7% faster. One other point about refreshing the memory expansion slot: this only works properly if the card is designed to use the row select signals decoded by the FPI. If the card decodes access addresses directly from the bank address provided by the CPU, then it must provide its own refreshing (and it will also have DMA compatibility problems). -- David Empson dempson@actrix.gen.nz Snail mail: P O Box 27-103, Wellington, New Zealand