TITLE
Apple II and IIe: Interface I/O Signal Timing 

Article ID: 11
Created: 9/21/84
Modified: 7/27/98
 

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TOPIC 
This article describes how the I/O strobe signals on the Apple II peripheral 
connector are handled.



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DISCUSSION 

The I/O strobe signals on the Apple II peripheral connector are decoded from the 
appropriate address lines and combined with the phase one clock. This is to reduce 
the TTL circuitry required to build a simple I/O port.


                        _______________                 _____
CLOCK 1          _______|               |_______________|

I/O SELECT       _______________________                 _____
I/O STROBE                              |_______________|
DEVICE SELECT 

DEVICE SELECT
A simple 8 bit output port would be a positive edge triggered latch with the clock 
tied to I/O select.

74LS374:                         __________
                       |          |
  GND -----------------| 1        |
  I/O STROBE ----------|11        |
                       |          |
  D0 ------------------| 3       2|---
  D1 ------------------| 4       5|---
  D2 ------------------| 7       6|---
  D3 ------------------| 8       9|---    8 bits of
  D4 ------------------|13      12|---    Latched TTL
  D5 ------------------|14      15|---    Output
  D6 ------------------|17      16|---
  D7 ------------------|18      19|---
                       |__________| 

Assumming that this interface is plugged into slot 1, any write operation to $C090..$C09F 
will transfer the data to the output lines. This is a very simple interface, so any read 
to $C090..$C09F will transfer random data to the output latch and to the Apple.